SolutionSource™ DirectoryTo source news and information about solutions from best-in-class providers to the electronics industry, please use key words or phrases in the search engine above, or browse through the DesignAware™ parametric search tree on the left which is organized according to a basic chip design workflow. To access individual supplier listing pages (containing further information on the company, tools and technologies) simply expand the search tree by clicking on the node symbols (i.e. "+" symbol, folder icon, etc.).
Interested in having your company and products appear in the SolutionSource™ Directory search tree? Click here | Supplier Insights Forte finds success with high-level synthesis
Certess’ verification qualification measures...
Synfora’s hierarchical algorithmic synthesis...
OneSpin fills verification 'gaps' with SVA...
Azuro reduces power with clock tree optimization
Non-volatile memory targets low process nodes
Solido Design’s statistical variation analysis is...
Cliosoft manages IC design data from any flow
Verification gains 'intelligence' with Nusym...
Envis automates clock gating, generates power vectors
ChipVision offers system-level power synthesis
Liga's 'hybrid' verification brings best...
Extreme DA strikes 'gold' with static timing...
ATopTech takes fresh approach to place and route
Agilent EEsof speeds signal integrity solutions
Apache extends power integrity to packages and PCBs
Formal tools fill gaps in verification flow
Mentor outlines ESL design and verification strategy
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