For about a decade, the design community has been working toward enabling pre-silicon software development through the virtualization of embedded hardware into so-called "virtual platforms."

During this process, several players such as Vast, Virtutech, Virtio (acquired by Synopsys) and CoWare have emerged to serve four key application markets, including automotive, networking, wireless and consumer multimedia. Even the biggest IP provider – ARM – got directly involved by acquiring Axys Design Automation, which in turn enhanced its silicon offering by adding virtual platforms for its processor IP.

 

Recently, we heard claims that lack of speed, model interoperability, support requirements of multicore designs, and proprietary languages would soon make existing solutions obsolete. This unfortunate outcome for the electronics industry could be avoided only with a new solution especially for embedded software development.

 

Taking it one step further, it was even suggested that the existing virtual platforms should be called hardware virtual platforms, and that new "software virtual platforms" would become necessary. Final proof of the doomsday theory was that companies in this domain – who allegedly provide ten-year-old solutions – would be doing much better if they only had the right solutions.

 

Well, we are of course not doomed, and to the contrary, the future does look quite bright. In fact, a closer look reveals that even the past does not look so bad after all. According to the market model introduced in Geoffrey Moore’s book "Crossing the Chasm," the industry’s progression has satisfied the innovators and early adopters at this point. We at Synopsys have more than 50 platforms in production that are currently being used by software developers. Between the five players in the market, there are probably more than 200 deployed virtual platforms.

 

It is no surprise that at this stage, the early adopter market is probably approaching saturation. A key characteristic attributed to these users is a pain level so high that they are willing to sacrifice on both standards and interoperability in lieu of getting the most pressing issue – pre-silicon embedded software development – taken care of.

 

For the majority of early users who crossed the chasm, the industry has taken collaborative efforts to overcome the hurdles proprietary solutions have admittedly presented. In January 2007, for example, Synopsys contributed key virtual platform technology to the Open SystemC Initiative (OSCI) Transaction-Level Modeling (TLM) working group.

Combined with the contributions from other companies, the TLM-2.0 API standard (TLM-2.0) has now been in collaborative development for the past 18 months. More recently, it was publicly reviewed in December 2007 and ratified in June 2008, just in time for the Design Automation Conference (DAC) where Synopsys and other players demonstrated working solutions.

 

So why is SystemC TLM-2.0 the answer? Because standardized interfaces lead to model interoperability, enabling users to efficiently compose and extend virtual platforms. In fact, the language in which the actual content of the models is written does not matter since SystemC TLM-2.0 allows for integrating models from different sources, without getting in the way of simulation performance. This presents a logical evolution of proprietary offerings.

 

Three key virtual platform-related technologies are released as part of the TLM-2.0 standard. First, direct memory interfaces (DMIs) allow processor models to access memories via "back-door access" without having to send transactions though complex bus hierarchies. This is the key to increasing virtual platform execution speed to the level required for software development. In comparison, all players had proprietary implementations of this interface in the past. Models have now become truly interoperable!

 

Second, fast loosely timed (LT) modeling capabilities allow peripheral models to execute and report timing without slowing down the simulation. And third, temporal decoupling allows processors and peripherals in multicore systems to execute in parallel and synchronize when needed – a key enabler for scalable multicore simulation within the SystemC infrastructure. As a result, processor and peripheral models have become truly interoperable without sacrificing speed and scalability.

 

In addition to these solutions that TLM-2.0 provides for virtual platforms, another key aspect that is equally important. A proper hardware/software design flow needs to be integrated, and the current border between early software development and verification is not very solid. As such, the suggested separation between software and hardware virtual platforms does not make sense.

 

TLM-2.0 ensures a smooth transition as its two coding styles – extremely fast loosely timed (LT) models and more detailed approximately timed (AT) models – are fully interoperable. SystemC is also already integrated with the well established RTL simulation environments, which allows TLM-2.0-based virtual platforms to easily become the front-end for integrated design and verification flows.

 

Is the classical virtual platform industry doomed as critics suggest? The ecosystem rallying around SystemC TLM-2.0 proves differently. The release of TLM-2.0 has been applauded and endorsed by almost 30 companies and organizations representing users, IP providers, EDA and service providers.

 

Among the supporters we find virtual platform developers and users such as Intel, NXP, STMicroelectronics and Texas Instruments, as well as IP providers including ARM, Arteris, MIPS, Rambus, Synopsys and Tensilica. With their support, EDA and service providers like Actis Design, Cadence, Carbon Design Systems, ChipVision Design Systems, CoFluent Design, CoWare, Doulos, ESLX, GreenSocs, JEDA Technologies, Mentor Graphics, SpringSoft, Synopsys and Virtutech are essentially pledging interoperability.

 

With standards in place to address and solve the model interoperability problem, we can move on to address the next real problem for the success and wider adoption of virtual platforms -- model availability. The availability of high-quality, high-performance IP models early in the development cycle is also crucial in order to enable pre-silicon use. At Synopsys, we’re addressing this market need by providing the DesignWare System-level Library, a vendor-independent model library that contains processor models of various IP providers, interconnect IP models, and connectivity IP models.

 

Virtual platforms are not doomed. They have satisfied innovators and early adopters, and now standard support, scalability and interoperability have come together to create a strong eco-system. As a result, SystemC-based virtual platforms are ready to cross the chasm for adoption by what Moore calls the early majority!

 

 

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