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DAC 'best paper' eases post-silicon debug

By Richard Goering

07/14/08

Research described in a Design Automation Conference "best paper" will make it much easier to locate bugs during post-silicon validation, according to Subhasish Mitra, assistant professor at Stanford University. The paper describes "instruction footprint recording" technology for bug localization. Read more...

Article Archive

Saturday, June, 7th 2008 by Richard Goering

Resonant clocking research promises IC energy savings
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Monday, May, 12th 2008 by Richard Goering

European project reshapes embedded system design
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Thursday, April, 10th 2008 by Richard Goering

FPGA prototype models thousand-core devices
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Wednesday, March, 5th 2008 by Richard Goering

Variability modeling moves to system level
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Sunday, January, 27th 2008 by Richard Goering

Researchers clear 'fog' around post-silicon debugging
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Friday, January, 4th 2008 by Richard Goering

Multi-band RF interconnect speeds network-on-chip
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Friday, November, 30th 2007 by Richard Goering

CMU project redefines network design
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Wednesday, October, 24th 2007 by Richard Goering

Berkeley ABC project reshapes logic synthesis
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